The present disclosure relates to computer memory and data retrieval. More specifically, the present disclosure relates to methods of retrieving data from stacked computer memory modules.
Stacked or 3-D computer memory modules provide benefits to computer systems, including reduced signal transmission times between chips on a printed circuit board or between stacked memory modules, and may improve memory and computer system performance. Through-silicon vias (TSVs) may be used to interconnect stacked computer memory modules in order to transmit power and data through the assembly of computer chips. In many circumstances, a computer memory chip may be printed having open spaces, frequently at the perimeter of the chip, to accommodate a through-silicon via connected to another memory chip, to a master computer memory chip, or to a power line (via a master computer memory chip). Computer memory arrays or logical elements on the computer memory chip may be electrically connected to one or more TSVs in order to allow a master computer memory chip to read data from a computer memory array, write data to a computer memory array, or to refresh data stored in a computer memory array.
A stacked computer memory module may include a single master memory chip (master chip) having logical circuitry that controls aspects of chip function such as data refresh and reading and writing data to and from several slave memory chips (or slave chips) that may contain further logical circuitry, power transmission, and DRAM memory arrays to hold data for a computer processor or other elements of a computer system. Communication within the computer system, coordinated through a memory controller in the computer memory system, may run through the memory system data bus into a master chip I/O driver array and further into a through silicon via (TSV) to access a selected memory array in order to read or to write data. Data may be transmitted to or from slave memory chips via electrical connections (pads) at the top of the master chip that are electrically connected to TSVs in slave chips via a permanently fastened solder bump between the pad and a TSV.